BookPlan: Difference between revisions

From XVis
Jump to navigation Jump to search
Line 53: Line 53:
#* Status: FDC
#* Status: FDC
#* Authors: Roba
#* Authors: Roba
# Data Model in VTK-m
#* Status: IP
#* Authors: James, Stephanie
# DPP with VTK-m
# DPP with VTK-m
#* Status: IP
#* Status: IP
Line 59: Line 62:
#* Status: MW
#* Status: MW
#* Authors: Vincent
#* Authors: Vincent
== Groupings ==
We identified 5 groupings of chapters:
# Group A (currently all under editing)
#* Revolutions in Processor Architecture
#* Getting Started with VTK-m
# Group B (currently all FDW)
#* GPU Computing
#* Data-Parallel Primitives
#* Advanced Data-Parallel Primitives
#* Device Adapters
# Group C (currently all MW)
#* Xeon Phi
#* Data Models For Representing Scientific Data
#* Array handles
#* Worklets
# Group D (currently all IP)
#* Programming Many-Core Architectures
#* Data Models in VTK-m
#* DPP with VTK-m
# Group E (currently all GS)
#* Template Meta-Programming
#* Getting Started with VTK-m

Revision as of 13:51, 24 November 2015

This wiki page contains the plan for completing the book by Dec. 11.

States for a chapter

A chapter may be in the following states:

  • (A) aspirational: we have talked about doing it
  • (IP) in progress: there is an outline, or some text has been written
  • (MW) mostly written: there is a solid draft, but still more to do
  • (FDC) first draft completed: the draft is ready to be reviewed ... the authors have done the best that they can
  • (UR) review: peers review the chapter and provide feedback
  • (FR) first revision: the authors take peer review feedback and modify the chapter. At this point, the contents of the chapter are assumed to be mostly correct
  • (E) under editing: read-alouds with peers
  • (SR) second revision: take feedback from read-alouds and making the final version of the chapter

Chapter Summaries

Note: numbers may or may not match chapter numbers in VTK-m textbook.

  1. Revolutions in Processor Architecture
    • Status: E
    • Authors: Dan, Sudhanshu, Stephanie, Ryan, Sam
  2. Programming Many-Core Architectures
    • Status: IP
    • Authors: Dan
  3. GPU Computing
    • Status: FDC
    • Authors: Ryan
  4. Xeon Phi
    • Status: MW
    • Authors: Hang, Dan, Stephanie
  5. Data-Parallel Primitives
    • Status: FDC
    • Authors: Sam
  6. Advanced Data-Parallel Primitives
    • Status: FDC
    • Authors: Sudhanshu, Matt
  7. Data Models For Representing Scientific Data
    • Status: MW
    • Authors: James, Stephanie
  8. Template Meta-Programming
    • Status: A
    • Authors: Jeremy Meredith
  9. Getting Started with VTK-m
    • Status: A/IP
    • Authors: Roba
  10. Basic VTK-m Usage
    • Status: E
    • Authors: lots
  11. Array Handles
    • Status: MW
    • Authors: Brent
  12. Device Adapters
    • Status: FDC
    • Authors: Roba
  13. Data Model in VTK-m
    • Status: IP
    • Authors: James, Stephanie
  14. DPP with VTK-m
    • Status: IP
    • Authors: Matt
  15. Worklets
    • Status: MW
    • Authors: Vincent

Groupings

We identified 5 groupings of chapters:

  1. Group A (currently all under editing)
    • Revolutions in Processor Architecture
    • Getting Started with VTK-m
  2. Group B (currently all FDW)
    • GPU Computing
    • Data-Parallel Primitives
    • Advanced Data-Parallel Primitives
    • Device Adapters
  3. Group C (currently all MW)
    • Xeon Phi
    • Data Models For Representing Scientific Data
    • Array handles
    • Worklets
  4. Group D (currently all IP)
    • Programming Many-Core Architectures
    • Data Models in VTK-m
    • DPP with VTK-m
  5. Group E (currently all GS)
    • Template Meta-Programming
    • Getting Started with VTK-m