BookPlan

This wiki page contains the plan for completing the book by Dec. 11.

States for a chapter

A chapter may be in the following states:

• (A) aspirational: we have talked about doing it
• (IP) in progress: there is an outline, or some text has been written
• (MW) mostly written: there is a solid draft, but still more to do
• (FDC) first draft completed: the draft is ready to be reviewed ... the authors have done the best that they can
• (UR) review: peers review the chapter and provide feedback
• (FR) first revision: the authors take peer review feedback and modify the chapter. At this point, the contents of the chapter are assumed to be mostly correct
• (E) under editing: read-alouds with peers
• (SR) second revision: take feedback from read-alouds and making the final version of the chapter

Chapter Summaries

Note: numbers may or may not match chapter numbers in VTK-m textbook.

1. Revolutions in Processor Architecture
   • Status: E
   • Authors: Dan, Sudhanshu, Stephanie, Ryan, Sam
2. Programming Many-Core Architectures
   • Status: IP
   • Authors: Dan
3. GPU Computing
   • Status: FDC
   • Authors: Ryan
4. Xeon Phi
   • Status: MW
   • Authors: Hang, Dan, Stephanie
5. Data-Parallel Primitives
   • Status: FDC
   • Authors: Sam
6. Advanced Data-Parallel Primitives
   • Status: FDC
   • Authors: Sudhanshu, Matt
7. Data Models For Representing Scientific Data
   • Status: MW
   • Authors: James, Stephanie
8. Template Meta-Programming
   • Status: A
   • Authors: Jeremy Meredith
9. Getting Started with VTK-m
   • Status: A/IP
   • Authors: Roba
10. Basic VTK-m Usage
    • Status: E
    • Authors: lots
11. Array Handles
    • Status: MW
    • Authors: Brent
12. Device Adapters
    • Status: FDC
    • Authors: Roba
13. Data Model in VTK-m
    • Status: IP
    • Authors: James, Stephanie
14. DPP with VTK-m
    • Status: IP
    • Authors: Matt
15. Worklets
    • Status: MW
    • Authors: Vincent

Groupings

We identified 5 groupings of chapters:

1. Group A (currently all under editing)
   • Revolutions in Processor Architecture
   • Getting Started with VTK-m
2. Group B (currently all FDW)
   • GPU Computing
   • Data-Parallel Primitives
   • Advanced Data-Parallel Primitives
   • Device Adapters
3. Group C (currently all MW)
   • Xeon Phi
   • Data Models For Representing Scientific Data
   • Array handles
   • Worklets
4. Group D (currently all IP)
   • Programming Many-Core Architectures
   • Data Models in VTK-m
   • DPP with VTK-m
5. Group E (currently all A/IP)
   • Template Meta-Programming
   • Getting Started with VTK-m

Timelines

• Group A:
  • UE: completes by Dec 4th
  • SR: completes by Dec 11th
• Group B:
  • UR begins Nov. 24th, completes 11/27
  • FR begins 11/28, completes 11/30
  • UE: begins Dec 1, completes by 12/4
  • SR: completes by Dec 11th
• Group C:
  • FDW by 11/25
  • UR begins 11/26, completes 11/30
  • FR: begins Dec 1, completes by 12/4
  • UE: begins 12/4, completes by 12/8
  • SR: completes by Dec 11th
• Group D:
  • FDW by 11/29
  • UR begins 11/30, completes 12/2
  • FR: begins Dec 2, completes by 12/6
  • UE: begins 12/6, completes by 12/10
  • SR: completes by Dec 11th
• Group E:
  • Timeline TBD